Analog IC Layout Engineer - South West England

Analog IC Layout Engineer - South West England

Our client, a growing supplier of high performance ICs seeks an experienced Analog/Mixed Signal IC Layout Engineer to work at their site along the M4 corridor, England.

Industry degree qualified (or equivalent), the successful applicant will have established experience in a similar role. Experience is required in some or all of the following;

* CMOS Analog layout
* Digital synthesis and layout with Cadence Encounter
* Tanner L-Edit layout design environment including scripting and TCell development
* Layout verification (Calibre, Assura, PVS).
* Parasitic extraction (RCX/QRC).
* Ability to understand and modify PVS & Assura runsets.
* Knowledge of Skill, Perl, C shell

Experience is also desired in some or all of the following; Taping out GDS2 into foundries, PDK development (including TCell development), Subversion, Grid Engine.

Excellent communication skills are required along with strong problem solving skills and a strong sense of initiative. You should have the confidence and ability to lead and mentor other layout and CAD Support engineers if required within a project.

If you would like the chance to join a successful and growing company with an great company atmosphere, then contact Ane at IC Resources today to apply.

Applicants with experience in; Analog, Analogue, Mixed Signal IC Layout, Leadership, CMOS, Cadence, Tanner, Skill, Perl, C shell, Assura, Parasitic extraction and Semiconductors will be considered for this role. Location: South West England.